One’s complement represents a negative number simply by inverting every bit of its positive counterpart. It is conceptually simpler than two’s complement but has a notable quirk: two distinct encodings of zero. This converter shows the exact bit pattern at common widths.
How it works
For a width of W bits:
- A non-negative value is written in plain binary, zero-padded to
Wbits. - A negative value
-vis the bitwise NOT ofv’s binary — equivalently the unsigned pattern is(2^W - 1) - v.
Because flipping all the bits of 0 (all zeros) gives all ones, you end up with both positive zero (000…0) and negative zero (111…1). The representable range is therefore symmetric: -(2^(W-1) - 1) to 2^(W-1) - 1.
Worked example: -42 in 8-bit one’s complement
Encode -42 in 8 bits:
- Write the positive magnitude:
42 → 00101010 - Invert every bit:
11010101 - Result:
0xD5in hex, reads as213unsigned (equal to255 - 42)
Compare with two’s complement, where -42 is 11010110 (which is 0xD6 = 214 unsigned). They differ by exactly 1 because two’s complement adds +1 after the bit flip. This relationship — one’s complement plus one equals two’s complement — is how two’s complement is derived.
Comparing the three signed-integer encodings at 8 bits
| Value | Sign-magnitude | One’s complement | Two’s complement |
|---|---|---|---|
| +5 | 00000101 | 00000101 | 00000101 |
| -5 | 10000101 | 11111010 | 11111011 |
| +0 | 00000000 | 00000000 | 00000000 |
| -0 | 10000000 | 11111111 | (does not exist) |
| -127 | 11111111 | 10000000 | 10000001 |
| -128 | (not representable) | (not representable) | 10000000 |
The dual-zero in one’s complement is clear: 00000000 (positive zero) and
11111111 (negative zero) both mean zero. This creates problems for equality
comparison in hardware and software that one’s complement processors handled
with special cases.
End-around carry: the arithmetic consequence
When adding two one’s complement numbers and a carry propagates out of the most significant bit, that carry must be added back into the least significant bit (end-around carry). Without this step, the result would be wrong by 1. For example:
+3 = 00000011
+ (-3) = 11111100
---------
11111111 ← carry-out: 0
Result 11111111 is negative zero — which is correct in this encoding.
But:
+5 = 00000101
+ (-3) = 11111100
---------
1 00000001 ← carry-out: 1 → add to result → 00000010 = +2 ✓
This end-around carry is the main hardware complexity that made two’s complement preferable: two’s complement addition needs no special case and carry-out is simply discarded.
Where one’s complement was actually used
Despite being largely obsolete, one’s complement was used in real, influential machines:
- CDC 6600 / CDC 7600 — Seymour Cray’s mainframes used one’s complement arithmetic
- PDP-1 — early DEC minicomputer
- UNIVAC 1100 series — one’s complement through several generations
- Ethernet checksums — the Internet Checksum (RFC 1071) uses one’s complement addition, which is why the algorithm still appears in networking code today
The converter uses exact BigInt arithmetic and works at 4, 8, 16, 32, and 64 bits. Nothing is sent over the network.