Count Leading Zeros (CLZ) tells you how many zero bits sit above the highest set bit of a number in a fixed-width register. It is a single CPU instruction on modern hardware and a building block for fast logarithms, normalisation, and power-of-two rounding. This tool computes it for any value and width from 8 to 128 bits.
How it works
For a value that fits within the chosen width w, the leading-zero count is the
width minus the number of significant bits:
significant bits = number of bits to write the value in binary
CLZ = w − significant bits (and CLZ = w when value is 0)
The position of the highest set bit is then w − CLZ − 1, counting from the
least-significant bit as position 0. Because leading zeros depend entirely on
the register size, the tool zero-pads the binary form to the selected width so
you can see the leading zeros directly.
What CLZ is used for in practice
CLZ is a surprisingly fundamental primitive. Several higher-level operations reduce to it:
Integer base-2 logarithm:
floor(log2(x)) = w − CLZ(x) − 1 (for x > 0)
This is used in hash table sizing, compression algorithms, and anywhere you need to know how many bits a number occupies.
Rounding up to the next power of two — for allocators, memory alignment, and buffer sizing:
if (x is already a power of two): result = x
else: result = 1 << (w − CLZ(x))
Floating-point normalisation — when a mantissa is computed with extra precision, the hardware CLZ instruction finds how many bits to shift left to normalise the result.
Priority encoder — given a bitmask of pending requests, CLZ of the reversed mask (or LZCNT of the original) finds the highest-priority set bit instantly without a loop.
Network prefix matching — the length of the common prefix of two IP addresses is a CLZ of their XOR, which is how some trie-based routing table implementations work.
Hardware support
Most modern architectures expose CLZ as a single-cycle instruction:
- x86-64:
LZCNT(explicit CLZ with defined zero behaviour) orBSR(bit-scan reverse, gives position of highest set bit — CLZ = w - 1 - BSR). - ARM/AArch64:
CLZinstruction, defined to return 32 or 64 for zero input. - RISC-V: handled via the
Zbbbit-manipulation extension (clz,clzw). - WASM:
i32.clzandi64.clzare first-class instructions in WebAssembly.
GCC and Clang expose CLZ via __builtin_clz(x) (32-bit) and __builtin_clzll(x) (64-bit). Note that GCC’s built-in is undefined for zero, so guard with if (x != 0) before calling it, or use the newer __builtin_clzg(x, default) where available.
Example and notes
For example, the hex value 0x00010000 is 2^16. In a 32-bit register it is written as
fifteen zeros, a single 1, then sixteen zeros, giving a CLZ of 15 and a highest
set bit at position 16. The integer base-2 logarithm follows immediately:
floor(log2(x)) = w − CLZ − 1. Be aware that on some processors CLZ
of zero is undefined; this tool defines it as the full width for convenience, matching ARM and WASM behaviour.